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Advanced D&V flow using virtual prototype + high-level synthesis for RISC-V based SoC

Join the OpenHW Foundation, CircuitSutra Technologies and RISE-DA for Advanced D&V flow using virtual prototype + high-level synthesis for RISC-V based SoC.
See how shift-left methodologies and Agentic AI Spec-to-Silicon flow accelerate HW/SW integration and validation at multiple abstraction levels.

StarRISC: Rad-hard RISC-V for outerspace!

Join Dr Li Chen and Christopher Elash, from the University of Saskatchewan, to explore how their STARRLab team is taking RISC-V from the lab to orbit, with a fully taped-out, space-ready ASIC based on OpenHW Foundation’s CORE-V-MCU.