<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>OpenHW TV on</title><link>https://openhwfoundation.org/resources/openhwtv/</link><description>Recent content in OpenHW TV on</description><generator>Hugo -- gohugo.io</generator><language>en</language><managingEditor>webdev@eclipse-foundation.org (Eclipse Foundation)</managingEditor><webMaster>webdev@eclipse-foundation.org (Eclipse Foundation)</webMaster><lastBuildDate>Wed, 08 Jul 2020 10:00:45 -0400</lastBuildDate><atom:link href="https://openhwfoundation.org/resources/openhwtv/index.xml" rel="self" type="application/rss+xml"/><item><title>OpenHW TV S04/E02</title><link>https://openhwfoundation.org/resources/openhwtv/s04e02/</link><pubDate>Tue, 24 Oct 2023 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s04e02/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/LXBfv3OAuhU"
>&lt;/a>
&lt;p>This episode of OpenHW TV focuses on the incredible journey of the open-source
RISC-V processor CVA6, from its inception as Ariane to its present state. The
discussion covers its current features, supported configurations (e.g.,
multicore) accelerators (e.g., RISC-V Vector), and platforms.&lt;/p>
&lt;p>Details of the ongoing design improvements and rigorous verification work will
be shared along with a demo of DOOM running on CVA6 (on an FPGA platform).&lt;/p>
&lt;p>Finally, we will discuss the future roadmap of CVA6 with multiple OpenHW Group
members. Featured Presenters:&lt;/p></description></item><item><title>TRISTAN Workshop: A Quick Introduction to CORE-V-VERIF</title><link>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-a-quick-introduction-to-core-v-verif/</link><pubDate>Tue, 01 Aug 2023 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-a-quick-introduction-to-core-v-verif/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/N3nQJpZN2_0"
>&lt;/a>
&lt;p>This workshop segment is led by Mario Rodriguez, OpenHW Group Verification
Engineer, Verification Task Group&lt;/p></description></item><item><title>TRISTAN Workshop: Open Source Hardware Basic Training (Part 1)</title><link>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-open-source-hardware-basic-training/</link><pubDate>Tue, 01 Aug 2023 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-open-source-hardware-basic-training/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/Twihznkd7-U"
>&lt;/a>
&lt;p>This workshop segment is led by:&lt;/p>
&lt;ul>
&lt;li>César Fuguet, Research and Development Engineer, CEA&lt;/li>
&lt;li>Mario Rodriguez, OpenHW Group Verification Engineer, Verification Task Group&lt;/li>
&lt;li>Davide Schiavone, OpenHW Group Director of Engineering, Cores Task Group&lt;/li>
&lt;li>Mike Thompson, OpenHW Group Director of Engineering, Verification Task Group&lt;/li>
&lt;/ul></description></item><item><title>TRISTAN Workshop: Open Source Hardware Basic Training (Part 2)</title><link>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-open-source-hardware-basic-training-part-2/</link><pubDate>Tue, 01 Aug 2023 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-open-source-hardware-basic-training-part-2/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/3r5STMiUq9s"
>&lt;/a>
&lt;p>This workshop segment is led by:&lt;/p>
&lt;ul>
&lt;li>César Fuguet, Research and Development Engineer, CEA&lt;/li>
&lt;li>Mario Rodriguez, OpenHW Group Verification Engineer, Verification Task Group&lt;/li>
&lt;li>Davide Schiavone, OpenHW Group Director of Engineering, Cores Task Group&lt;/li>
&lt;li>Mike Thompson, OpenHW Group Director of Engineering, Verification Task Group&lt;/li>
&lt;/ul></description></item><item><title>TRISTAN Workshop: Simulating CV32E40P in CORE-V-VERIF</title><link>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-simulating-cv32e40p-in-core-v-verif/</link><pubDate>Tue, 01 Aug 2023 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-simulating-cv32e40p-in-core-v-verif/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/nGs6riKUZLU"
>&lt;/a>
&lt;p>This workshop segment is led by Mike Thompson, OpenHW Group Director of
Engineering, Verification Task Group&lt;/p></description></item><item><title>TRISTAN Workshop: Simulating CVA6 in CORE-V-VERIF</title><link>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-simulating-cva6-in-core-v-verif/</link><pubDate>Tue, 01 Aug 2023 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/tristan-workshop-simulating-cva6-in-core-v-verif/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/8p7TMX4GPmo"
>&lt;/a>
&lt;p>This workshop segment is led by Mario Rodriguez, OpenHW Group Verification
Engineer, Verification Task Group&lt;/p></description></item><item><title>OpenHW TV S04/E01</title><link>https://openhwfoundation.org/resources/openhwtv/s04e01/</link><pubDate>Tue, 28 Mar 2023 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s04e01/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/MNYOaJGltYY"
>&lt;/a>
&lt;p>Security has become a critical issue for the entire IoT supply chain in recent
years, as the number of connected devices continues to grow and our reliance on
them increases. With more devices connected to the internet, the potential for
security breaches and data theft also increases. The following topics will be
discussed in this episode:&lt;/p>
&lt;ul>
&lt;li>
&lt;p>Brief overview of the CORE-V Trusted MCU Project. (This project was developed
to ensure there is an option for the very best security starting from the
design phase on all OpenHW devices.)&lt;/p></description></item><item><title>OpenHW TV S03/E08</title><link>https://openhwfoundation.org/resources/openhwtv/s03e08/</link><pubDate>Thu, 27 Oct 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e08/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/2CHzsKsFU0s"
>&lt;/a>
&lt;p>This OpenHW TV episode introduces the new Chair of the OpenHW Verification Task Group and the expanded charter to help support the growing RISC-V Verification Ecosystem.&lt;/p>
&lt;p>The OpenHW Group welcomes Simon Davidmann of Imperas Software, a founding member of OpenHW, as the new Chair of the OpenHW Verification Task Group (VTG). As part of the CORE-V roadmap, the VTG is updating the successful CORE-VERIF framework to address both the increasing design complexity and improve the DV efficiency for the anticipated bandwidth required for all the new CORE-V cores in development.&lt;/p></description></item><item><title>OpenHW TV S03/E07</title><link>https://openhwfoundation.org/resources/openhwtv/s03e07/</link><pubDate>Tue, 04 Oct 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e07/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/ADD2PL2w5nM"
>&lt;/a>
&lt;p>Did you miss out on Embedded World in Nuremburg, Germany in June? This episode of OpenHW TV will give you another chance to view OpenHW Group&amp;rsquo;s live presentation and hear all of the details on the new CORE-V MCU DevKit! OpenHW Group and its members announced one of the industry’s most comprehensive open-source RISC-V Development Kits at Embedded World 2022. The CORE-V MCU DevKit features the OpenHW CORE-V MCU, the CORE-V software developer kit (SDK) with full-featured Eclipse-integrated development environment (IDE) and an open printed circuit board (PCB) design that supports AWS via AWS IoT ExpressLink. The ground-breaking RISC-V-based CORE-V MCU DevKit enables software development for embedded, internet-of-things (IoT), and artificial intelligence (AI)-driven applications.&lt;/p></description></item><item><title>OpenHW TV S03/E06</title><link>https://openhwfoundation.org/resources/openhwtv/s03e06/</link><pubDate>Wed, 29 Jun 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e06/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/if4kzMU1z8A"
>&lt;/a>
&lt;p>OpenHW Group is the leading global organization developing fully open-source and industry-ready RISC-V IP. Our membership spans the globe and has increasing membership within the Asia region. This seminar will introduce OpenHW Group and the objectives of OpenHW Group Asia, our Asia-focused working group. We will feature talks on CORE-V processor roadmaps, verification approaches, and software support for CORE-V cores. Please join us for this informative seminar!&lt;/p>
&lt;p>Participants include Duncan Bees, Davide Schiavone and Mike Thompson from the OpenHW Group Staff, along with Wei Wu, IS-CAS, and Kan Shi, ICT-CAS.&lt;/p></description></item><item><title>OpenHW TV S03/E05</title><link>https://openhwfoundation.org/resources/openhwtv/s03e05/</link><pubDate>Thu, 09 Jun 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e05/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/xKzsK87gMEU"
>&lt;/a>
&lt;p>This episode of OpenHW TV will focus on the verification of the CORE-V-MCU currently under development by the OpenHW Group. Followers of OpenHW TV may recall that the CORE-V-MCU started out its life as the Arnold device (&lt;a href="https://bit.ly/3PrfMCb">https://bit.ly/3PrfMCb&lt;/a>) from the PULP-Platform team at ETH Zürich. Arnold has been successfully implemented in silicon, so a reasonable question is: &amp;ldquo;Why does the CORE-V-MCU need more verification?&amp;rdquo;&lt;/p>
&lt;p>The answer to this question lies in the goals of the CORE-V-MCU which are to enable rapid deployment of hardware and software development kits and to accelerate the design of commercial SoC devices based on CV32E40P.&lt;/p></description></item><item><title>OpenHW TV S03/E04</title><link>https://openhwfoundation.org/resources/openhwtv/s03e04/</link><pubDate>Fri, 29 Apr 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e04/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/-KUrfYI6jkk"
>&lt;/a>
&lt;p>Automated code validation, continuous integration and test regression are cornerstones of OpenHW Group&amp;rsquo;s community-based engineering process to develop and verify high-quality processor cores. OpenHW Group is deploying a state-of-the-art Test Automation and Continuous Integration environment to achieve these objectives across our diverse projects, resulting in faster development cycles with increased quality. In this webinar, Florian Zaruba and Massimiliano (Max) Giacometti of the OpenHW Group staff will review OpenHW’s CI requirements and approaches.&lt;/p></description></item><item><title>OpenHW TV S03/E03</title><link>https://openhwfoundation.org/resources/openhwtv/s03e03/</link><pubDate>Tue, 22 Mar 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e03/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/mSjJ478p0Zs"
>&lt;/a>
&lt;p>Open-source technologies have revolutionized industrial hardware and software development. These approaches are now bringing new energy to engineering education. Universities use open-source hardware and software to teach architectures and concepts while providing students hands-on experience with coding, design, and research.&lt;/p>
&lt;p>In this webinar, we highlight the use of OpenHW Group CORE-V open-source RISC-V CPUs at leading Universities to teach CPU architecture, instruction-sets, and HW design. CORE-V platforms are used in bachelor’s level engineering coursework, at the master’s thesis level, and also in doctoral research. Students have contributed their work back to open-source projects at OpenHW Group, gaining valuable industrial experience. The PULP Training workshop developed by ETH Zurich compliments for-credit courses to help companies and universities start working with CORE-V CPUs and PULP microcontrollers.&lt;/p></description></item><item><title>OpenHW TV S03/E02</title><link>https://openhwfoundation.org/resources/openhwtv/s03e02/</link><pubDate>Thu, 03 Mar 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e02/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/ekMwejZlJEo"
>&lt;/a>
&lt;p>This episode features the artificial intelligence angle of the OpenHW Group CORE-V family. We will focus specifically on the CV32E40P RISC-V CPU. In the last decade we experienced that as technology scales, silicon devices become smarter and smarter, capable of implementing complex functions on hand-sized (or lower) objects such as: face recognition on mobile phones; wearable sport and health monitoring products; smart glasses; augmented reality headset; etc. Such features have become real not only due to silicon scaling but also thanks to innovative computer architectures and software stacks.&lt;/p></description></item><item><title>OpenHW TV S03/E01</title><link>https://openhwfoundation.org/resources/openhwtv/s03e01/</link><pubDate>Tue, 15 Feb 2022 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s03e01/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/KDs5gVxPOr8"
>&lt;/a>
&lt;p>In this discussion, Nitin and Rick will discuss the key drivers for growth of open-source processor development, among other topics including the latest milestones and projects of the OpenHW Group. A live chat with attendees will be featured at the end of the interview.&lt;/p>
&lt;p>&lt;a href="https://v.youku.com/v_show/id_XNTg0MTg1NzcyOA==.html">View on youku.com&lt;/a>&lt;/p></description></item><item><title>OpenHW TV S02 E08</title><link>https://openhwfoundation.org/resources/openhwtv/s02e08/</link><pubDate>Fri, 12 Nov 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e08/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/G5ecWSBCqPw"
>&lt;/a>
&lt;p>As RISC-V evolves over time, the set of ISA features supported by each software ecosystem will also need to evolve over time, and new software ecosystems will be added. To manage this evolution, RISC-V is moving towards a model of regular annual delivery of a coherent set of ISA updates according to an ISA roadmap, and architecture profiles are intended to provide the natural structure for planning, packaging, and releasing these ISA updates.&lt;/p></description></item><item><title>OpenHW TV S02 E07</title><link>https://openhwfoundation.org/resources/openhwtv/s02e07/</link><pubDate>Thu, 07 Oct 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e07/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/QzCa3VlflT4"
>&lt;/a>
&lt;p>The CV32E4 family of open-source RISC-V CPUs is a set of processors that target embedded-class devices from edge-computing platforms to microcontrollers. This OpenHW Group TV episode shows the current state of projects surrounding the family of CORE-V IPs as: the CV32E40X for extending the computation capability of edge-nodes easily; the CV32E40S for secure applications; the CV32E20 for area-efficient microcontrollers; the CV32E40Pv2 project for completing the design and verification of the CV32E40P core for edge-computing platforms; and the CV32E41P for proving the newest Zfinx and Zce RISC-V ISA draft-extensions.&lt;/p></description></item><item><title>OpenHW TV S02 E06</title><link>https://openhwfoundation.org/resources/openhwtv/s02e06/</link><pubDate>Thu, 24 Jun 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e06/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/W_a_K1T6Aj4"
>&lt;/a>
&lt;p>A key feature of the free and open RISC-V ISA is extensibility with the ability to add user-defined custom accelerators and instructions. The CORE-V eXtension I/F project within the OpenHW Group aims to provide a standard reusable interface to simplify how these custom accelerators can be connected to the family of CORE-V cores.&lt;/p>
&lt;p>The webinar provides an overview of the CORE-V eXtension I/F, the project structure and roadmap as well as the SW tool chain implications of custom instructions. We&amp;rsquo;ll also hear from one of the newest OpenHW Group members, Imagination Technologies and their motivations for joining the OpenHW ecosystem.&lt;/p></description></item><item><title>OpenHW TV S02 E05</title><link>https://openhwfoundation.org/resources/openhwtv/s02e05/</link><pubDate>Thu, 27 May 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e05/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/jVjqOGLBmBM"
>&lt;/a>
&lt;p>This OpenHW TV episode highlights the motivation behind the OpenHW continuous integration (CI) environment and the benefits it delivers to open source development.&lt;/p>
&lt;p>The episode (broadcast live on May 27) dives into the importance of continuous integration, takes a closer look at the OpenHW CI environment, and examines how CI is employed specifically within the CORE-V Verification Test Bench and the CORE-V MCU projects.&lt;/p>
&lt;p>Additionally, the webinar explores the OpenHW core-v-verif GitHub repository, the distributed workflow in place, as well as the branching strategy used to manage multiple CORE-V core verification projects within a single repository.&lt;/p></description></item><item><title>OpenHW TV S02 E04</title><link>https://openhwfoundation.org/resources/openhwtv/s02e04/</link><pubDate>Thu, 22 Apr 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e04/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/8ooIqMHM9Ks"
>&lt;/a>
&lt;p>In this webinar led by Jeremy Bennett (at Embecosm), learn about projects run by our Software Task Group including the CORE-V FreeRTOS project featuring a demo from Robert Balas (ETH Zürich) and Shteryana Shopova (Embecosm). There are updates about the GCC and Clang/LLVM compiler tool chains from Philipp Krones and Jessica Mills (Embecosm) plus details on IDE projects from Ivan Kravets (PlatformIO) and Alexander Fedorov (Arsysop/Eclipse).&lt;/p>
&lt;p>&lt;a href="https://v.youku.com/v_show/id_XNTE0MzU1OTgzNg==.html">View on youku.com&lt;/a>&lt;/p></description></item><item><title>OpenHW TV S02 E03</title><link>https://openhwfoundation.org/resources/openhwtv/s02e03/</link><pubDate>Thu, 18 Mar 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e03/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/numVpvIgUX4"
>&lt;/a>
&lt;p>This TV episode focuses on OpenHW Accelerate, a $22.5M multi-year co-funded research program announced in March 2021. It showcases the first OpenHW Accelerate project, CORE-V VEC, which is a research effort to explore architectural optimizations for RISC-V vector processor implementations used in high-throughput multi-dimensional sensor data processing and ML acceleration at the Edge.&lt;/p>
&lt;p>&lt;a href="https://v.youku.com/v_show/id_XNTEyNDEwNjY5Ng==.html">View on youku.com&lt;/a>&lt;/p></description></item><item><title>OpenHW TV S02 E02</title><link>https://openhwfoundation.org/resources/openhwtv/s02e02/</link><pubDate>Thu, 18 Feb 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e02/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/rBMOfFKgxso"
>&lt;/a>
&lt;p>The fast-growing, open source OpenHW ecosystem is the focus of this episode of OpenHW TV. OpenHW IP adopters highlight the key drivers for their engagement in the OpenHW community. The episode also contains an extended Q&amp;amp;A session addressing questions such as what the sweet spot is for RISC-V cores such as CORE-V, and which RISC-V ISA extensions are most important. Watch the video of the webinar broadcast on 18 February now.&lt;/p></description></item><item><title>OpenHW TV S02 E01</title><link>https://openhwfoundation.org/resources/openhwtv/s02e01/</link><pubDate>Thu, 28 Jan 2021 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s02e01/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/LZ8N3uLD4wY"
>&lt;/a>
&lt;p>2021. New year, new episode of OpenHW TV. In the first episode of Season Two, we feature an interview between embedded.com editor-in-chief Nitin Dahad and OpenHW Group President and CEO Rick O&amp;rsquo;Connor. They discuss the latest milestones of the OpenHW Group, the roadmap for the organization, as well as the key issues that are driving the growth of open-source processor design and development. Plus there’s a brief bonus round-up of Season One showing the interesting range of guidance and discussion that was presented last year.&lt;/p></description></item><item><title>OpenHW TV S01 E06</title><link>https://openhwfoundation.org/resources/openhwtv/s01e06/</link><pubDate>Fri, 20 Nov 2020 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s01e06/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/UfZ3jbH6eM0"
>&lt;/a>
&lt;p>Our last webinar episode of 2020 is now available to watch on-demand. Last month we looked at our progress on the RTL functional freeze milestone for the CVE4 and how we arrived there with the high-quality verification work from our members. We had a lot of questions about the Formal Verification work carried out to get us this far, so we have dedicated this episode to a deep-dive into the Formal Verification work and to hear from our partners on what it actually means. As always, the panel session will be live for a Q&amp;amp;A with all our speakers.&lt;/p></description></item><item><title>OpenHW TV S01 E05</title><link>https://openhwfoundation.org/resources/openhwtv/s01e05/</link><pubDate>Thu, 29 Oct 2020 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s01e05/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/B5CPAztbj5g"
>&lt;/a>
&lt;p>Back in June, the first episode of OpenHW TV looked at the CORE-V Verification Test Bench and our open-source RISC-V processor IP design verification plan. Just 4 months on and OpenHW Group is approaching the Functional RTL Freeze milestone for the CVE4. This episode looks at what the Functional RTL Freeze milestone means and how learnings from our early verification efforts have shaped our test bench progress, highlighting bugs and coverage gaps to help us deliver commercial grade, industrial quality verification work. Presenters include the Verification Task Group leadership team as well as key members of the OpenHW Group ecosystem who have collaborated to build our industry quality, coverage driven CORE-V Verification Test Bench.&lt;/p></description></item><item><title>OpenHW TV S01E04</title><link>https://openhwfoundation.org/resources/openhwtv/s01e04/</link><pubDate>Mon, 05 Oct 2020 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s01e04/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/GOEvs7YFTzE"
>&lt;/a>
&lt;p>Episode 4 discusses the OpenHW Group philosophy of learn, adopt, produce: learning about what is available in open-source ecoysystems, adopting and gaining experience on using these building blocks and deploying commercial grade open-source elements in production releases of designs. The episode includes updates from the OpenHW Group HW Task Group discussing the CORE-V MCU SoC project and features speakers from QuickLogic giving an overview of the ETH Zurich &amp;ldquo;Arnold&amp;rdquo; test chip and the path to production for the CORE-V MCU SoC, as well as Global Foundries talking about the features and benefits of 22FDX. You will also hear from the ARC Investment VC fund with insights into why there is early investment in open-source activity and as always, the popular Q&amp;amp;A at the end with the panel.&lt;/p></description></item><item><title>OpenHW TV S01E03</title><link>https://openhwfoundation.org/resources/openhwtv/s01e03/</link><pubDate>Wed, 26 Aug 2020 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s01e03/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/tZJ8-umar4k"
>&lt;/a>
&lt;p>Episode 03 features our HW and SW Task Groups, as well as guest member Ashling. The Chairs of the groups talk about the work of the SW and HW Task Groups to date, including an outlook to future roadmaps. We also look in detail at the open source GNU toolchain for the CORE-V family of RISC-V cores provided by Embecosm, and Ashling presents an in-depth overview and live demonstration of the RiscFree Eclipse based IDE debug interface to the Genesys2 FPGA board. It&amp;rsquo;s an opportunity to see the complete CORE-V MCU FPGA development environment and hear the questions from the live Q&amp;amp;A session at the end with our panelists.&lt;/p></description></item><item><title>OpenHW TV S01E02</title><link>https://openhwfoundation.org/resources/openhwtv/s01e02/</link><pubDate>Thu, 16 Jul 2020 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s01e02/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/7LqCnQ4aaWM"
>&lt;/a>
&lt;p>Episode 2 of OpenHW TV gives an in-depth overview and progress to date of the CVE4 (previously RI5CY) and CVA6 (previously Ariane) cores with panelists from the OpenHW Group Cores Task Group answering questions in an interesting Q&amp;amp;A session at the end.&lt;/p>
&lt;p>&lt;a href="https://player.youku.com/embed/XNDc1OTQ4MTA3Ng==?client_id=4d6c5c68498ff602">View on youku.com&lt;/a>&lt;/p></description></item><item><title>OpenHW TV S01E01</title><link>https://openhwfoundation.org/resources/openhwtv/s01e01/</link><pubDate>Thu, 18 Jun 2020 00:00:00 +0000</pubDate><author>webdev@eclipse-foundation.org (Eclipse Foundation)</author><guid>https://openhwfoundation.org/resources/openhwtv/s01e01/</guid><description>&lt;a
class="eclipsefdn-video"
href="//www.youtube.com/embed/GNElOjxo0GQ"
>&lt;/a>
&lt;p>We live-streamed a world class first episode of OpenHW TV on 18th June and even exceeded our registration numbers, as guest presenters from Metrics and Imperas highlighted the open source CORE-V processor IP design verification plan. Our live Q&amp;amp;A session at the end with panellists from OpenHW Group including the Co-Chairs of our Verification Task Group was extremely popular and provoked some great discussion.&lt;/p>
&lt;p>&lt;a href="https://player.youku.com/embed/XNDc0OTI4MzI2NA==?client_id=4d6c5c68498ff602">View on youku.com&lt;/a>&lt;/p></description></item></channel></rss>